CV - Amirmahdi Joudi

Work experience

2022-2025: Graduate Research Assistant

CAD-LAB, University of Tehran
HIRMA: High-Performance Implementation for RISC-V Microcontroller Applications: a RISC-V based microcontroller design named HIRMA.
An Integrated Framework for Aging Analysis Based on an Age-Aware Cell Library: device-level aging parameters backpropagation into age-aware gate models in systemC using an automated framework.
SoC design and prototyping: Mentoring a group for prototyping of an embedded-system including risc-v processor, uart, timer, crc, aes, rsa, and memories with implementation of small-OS in C language for the purpose of embedded-systems.
PIES-BCI (Project for implementation of an embedded system for brain-computer interface applications): a framework for compilation of a reconfigurable embedded system including filters, feature extractors, and classifiers for BCI applications like P300-speller in systemC and verilog for hardware implementation.
Supervisor: Prof. Zainalabedin Navabi

2021-2022: Undergraduate Research Assistant

CAD-LAB, University of Tehran
AFTAB RTL optimization using QFlow: Timing and power optimization of a risc-v processor named AFTAB at register transfer level using post-route STA in qflow, and dynamic power report in Synopsys Design Compiler.
AFTAB prototyping using ALTERA Cyclone series: Prototyping and testing of AFTAB using cyclone FPGA and GNU-toolchain.
Supervisor: Prof. Zainalabedin Navabi

Feb 2025 - July 2025: Summer Intern

2021: R&D Engineer

2021: Intern

CV